I'm looking for available open-source ASIC code designs which can be used to produce high-efficiency Bitcoin miners (similar to Butterfly Labs, etc.)
Either HDL or VHDL, or any other kind of implementations for ASIC devices would be useful. This could be open data in the form of some logic representation (such as HDL), which can be used to simulate such miners for ASIC chip. This is similar to software to simulate ASIC chip logic, but I'm looking for available data.
